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首页> 外文期刊>IEEE Journal of Solid-State Circuits >An Ultra-Low-Power Memory With a Subthreshold Power Supply Voltage
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An Ultra-Low-Power Memory With a Subthreshold Power Supply Voltage

机译：具有亚阈值电源电压的超低功耗存储器

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A 512times13 bit ultra-low-power subthreshold memory is fabricated on a 130-nm process technology. The fabricated memory is fully functional for read operation with a 190-mV power supply at 28 kHz, and 216 mV for write operation. Single bits are measured to read and write properly with VDD as low as 103 mV and 129 mV, respectively. The memory operates at a 1-MHz clock rate with a 310-mV power supply. This operating point has 1.197 muW power consumption, of which 0.366 muW is due to leakage and 0.831 muW is due to dynamic power dissipation. Analysis of the available fan-out or fan-in that can be supported at a given voltage is summarized. A number of circuit techniques are presented to overcome the substantially reduced on-to-off current ratios and the poor drive strength of transistors operating in subthreshold. These include a gated feedback memory cell, and hierarchical read and decode circuits. The memory is dynamic, with pseudo-static operation provided via self-timed control of the keeper transistors to mitigate increased variability manifested in subthreshold operation
机译：在130纳米工艺技术上制造了512×13位超低功耗亚阈值存储器。所制造的存储器具有190mV电源（28kHz）和216mV（写入）的全部功能，可用于读取操作。在VDD分别低至103 mV和129 mV的情况下，测量单个位以正确读写。该存储器以310mV电源以1MHz时钟速率运行。该工作点的功耗为1.197μW，其中0.366μW是由于泄漏引起的，而0.831μW是由于动态功耗引起的。总结了在给定电压下可以支持的可用扇出或扇入的分析。提出了许多电路技术来克服在亚阈值下工作的晶体管的通断电流比大大降低和驱动强度差的问题。这些包括门控反馈存储单元以及分层读取和解码电路。该存储器是动态的，通过保持器晶体管的自定时控制提供伪静态操作，以减轻亚阈值操作中表现出的增加的可变性

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