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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 3-bit Soft-Decision IC for Powerful Forward Error Correction in 10-Gb/s Optical Communication Systems
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A 3-bit Soft-Decision IC for Powerful Forward Error Correction in 10-Gb/s Optical Communication Systems

机译：用于10 Gb / s光通信系统中强大前向纠错功能的3位软判决IC

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摘要

We describe the design concept and performance of a 3-bit soft-decision IC, which opens a vista for new terabit-capacity optical communication systems by dramatically improving the capability of forward error correction (FEC). The proposed soft-decision IC is composed of five functional blocks, i.e., a soft-decider, an error filter, a 3-bit encoder, a 3:48 de-multiplexer, and a clock recovery circuit. The biggest challenge was the soft-decision block regenerating the common data using seven deciders with separate thresholds. We employed a novel SiGe BiCMOS process and a custom BGA package made from low-temperature co-fired ceramics to achieve a high sensitivity of 20 mVpp with a wide phase margin of 270° for 12.4-Gb/s nonreturn-to-zero (NRZ) data signals. The error filter and the 3-bit encoder, which are incorporated in the IC, prevent the degradation of the FEC performance due to signal noise or fluctuations. The 3:48 de-multiplexer provides an accessible interface with the FEC encoder/decoder LSI. The clock recovery circuit, based on a phase-locked-loop technology, fulfilled the jitter tolerance requirements corresponding to ITU-T G.825, even for 55% duty cycle optical return-to-zero (RZ) signals. The 3-bit soft-decision IC, in cooperation with a block turbo encoder/decoder, achieved a record net coding gain of 10.1 dB with 24.6% redundancy, which is only 0.9 dB away from the Shannon limit for a code rate of 0.8 for a binary symmetric channel.
机译：我们描述了3位软判决IC的设计概念和性能，该IC通过显着提高前向纠错（FEC）的能力为新的千兆位容量光通信系统打开了远景。提出的软判决IC由五个功能块组成，即软判决器，误差滤波器，3位编码器，3：48解复用器和时钟恢复电路。最大的挑战是软决策块使用七个具有独立阈值的决策器来重新生成公共数据。我们采用了新颖的SiGe BiCMOS工艺和由低温共烧陶瓷制成的定制BGA封装，以实现12.4 Gb / s不归零（NRZ）的20 mVpp的高灵敏度和270°的宽相位裕量。 ）数据信号。 IC中内置的误差滤波器和3位编码器可防止由于信号噪声或波动而导致FEC性能下降。 3:48解复用器提供了与FEC编码器/解码器LSI的可访问接口。基于锁相环技术的时钟恢复电路，即使对于55％占空比的光学归零（RZ）信号，也满足了ITU-T G.825的抖动容限要求。 3位软判决IC与块Turbo编码器/解码器配合使用，实现了创纪录的10.1 dB的净编码增益和24.6％的冗余，与香农极限仅相距0.9 dB，而编码率为0.8。二进制对称通道。

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