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首页> 外文期刊>IEEE Journal of Solid-State Circuits >Full-CMOS 2-GHz WCDMA direct conversion transmitter and receiver
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Full-CMOS 2-GHz WCDMA direct conversion transmitter and receiver

机译:全CMOS 2 GHz WCDMA直接转换发送器和接收器

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摘要

This paper presents a full-CMOS transmitter and receiver for 2.0-GHz wide-band code division multiple access with direct conversion mixers and a DC-offset cancellation scheme. The direct conversion scheme combined with a multiphase sampling fractional-N prescaler alleviates the problems of the direct conversion transmitter and receiver. Digital gain control is merged into the baseband filters and variable-gain amplifiers to optimize the linearity of the system, reduce the noise, and improve the sensitivity. Variable-gain amplifiers with DC-offset cancellation loop eliminate the DC-offset in each stage. The chip implemented in 0.35-Μm CMOS technology shows the experimental results of 6 dBm maximum output power with 38-dB adjacent channel power rejection ratio at 1.92 MHz, 50-dB dynamic range, and 363-mW power consumption in the transmitter. The receiver shows -115.4 dBm sensitivity, a 4.0-dB noise figure, and a dynamic range of 80-dB with 396-mW power consumption.
机译:本文提出了一种具有直接转换混频器和DC偏移消除方案的用于2.0 GHz宽带码分多址的全CMOS发送器和接收器。直接转换方案与多相采样分数N预分频器相结合,减轻了直接转换发送器和接收器的问题。数字增益控制被合并到基带滤波器和可变增益放大器中,以优化系统的线性度,降低噪声并提高灵敏度。具有直流偏移消除环路的可变增益放大器消除了每个阶段的直流偏移。采用0.35-μmCMOS技术实现的芯片显示了在1.92 MHz频率下具有38dB邻道功率抑制比,6dB动态范围和363mW发射器功耗的最大输出功率6dBm的实验结果。接收机的灵敏度为-115.4 dBm,噪声系数为4.0 dB,动态范围为80 dB,功耗为396 mW。

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