A multibit sigma-delta ADC for multimode receivers

Miller M.R.; Petrie C.S.

首页> 外文期刊>IEEE Journal of Solid-State Circuits >A multibit sigma-delta ADC for multimode receivers

【24h】

A multibit sigma-delta ADC for multimode receivers

机译：适用于多模接收机的多位sigma-delta ADC

获取原文

获取原文并翻译 | 示例

掌桥外文数据库（机构版） >>

开具论文收录证明 >>

文献代查 >>

页面导航

摘要
著录项
相似文献
相关主题

摘要

A 2.7-V sigma-delta modulator with a 6-bit quantizer is fabricated in a 0.18-/spl mu/m CMOS process. The modulator makes use of noise-shaped dynamic element matching (DEM) and quantizer offset chopping to attain high linearity over a wide bandwidth. The DEM algorithm is implemented in such a way as to minimize additional delay within the feedback loop of the modulator, thereby enabling the use of the highest resolution quantizer yet reported in a multibit sigma-delta analog-to-digital converter of this speed. The part achieves 95-dB peak spurious-free dynamic range and 77-dB signal-to-noise ratio over a 625-kHz bandwidth, and consumes 30 mW at a sampling frequency of 23 MHz. The part achieves 70-dB signal-to-noise ratio over a 1.92-MHz bandwidth and dissipates 50 mW when clocked at 46 MHz.

机译：具有0.1位量化器的2.7V sigma-delta调制器采用0.18- / spl mu / m CMOS工艺制造。调制器利用噪声形动态元素匹配（DEM）和量化器偏移斩波来在较宽的带宽上实现高线性度。 DEM算法以使调制器的反馈环路内的附加延迟最小化的方式实现，从而可以使用在此速度的多位sigma-delta模数转换器中报告的最高分辨率量化器。该器件在625kHz带宽上达到95dB的无杂散峰值动态范围和77dB的信噪比，并在23MHz的采样频率下消耗30mW的功率。该器件在1.92MHz带宽上达到70dB的信噪比，并以46MHz的时钟频率耗散50mW。

著录项

来源
《IEEE Journal of Solid-State Circuits》 |2003年第3期|p.475-482|共8页
作者
Miller M.R.; Petrie C.S.;
展开▼
作者单位

Motorola Inc., Schaumburg, IL, USA;

展开▼
收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种 eng
中图分类无线电电子学、电信技术;
关键词
sigma-delta modulation; radio receivers; CMOS integrated circuits; mixed analogue-digital integrated circuits; integrated circuit noise; circuit feedback; cellular radio; integrated circuit design; multibit sigma-delta ADC; multimode receivers; 6-bit;

机译：sigma-delta调制无线电接收机;CMOS集成电路;混合模数集成电路;集成电路噪声;电路反馈;蜂窝无线电;集成电路设计;多位Σ-ΔADC;多模接收机;6位;

相似文献

外文文献
中文文献
专利

1. A multibit sigma-delta ADC for multimode receivers [J] . Miller M.R., Petrie C.S. IEEE Journal of Solid-State Circuits . 2003,第3期

机译：适用于多模接收机的多位sigma-delta ADC
2. A 1.2-V 165-$mu$ W 0.29-mm$^{2}$ Multibit Sigma-Delta ADC for Hearing Aids Using Nonlinear DACs and With Over 91 dB Dynamic-Range [J] . Custodio J.R., Goes J., Paulino N., IEEE transactions on biomedical circuits and systems . 2013,第3期

机译：一个1.2V165-μmu$ W 0.29-mm $ ^ {2} $多位Sigma-Delta ADC，用于使用非线性DAC和超过91 dB动态范围的助听器
3. A Second-Order Sigma-Delta Modulator with a Gain Scaling of ADC and a Simple Multibit DAC [J] . Byung-Woog Cho, Pyung Choi, Jun-Rim Choi IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences . 2000,第6期

机译：具有ADC增益缩放和简单多位DAC的二阶Sigma-Delta调制器
4. A novel architecture for reducing the sensitivity of multibit sigma-delta ADCs to DAC nonlinearity [C] . Adams, M.H., Toumazou, . 1995

机译：一种新颖的架构，用于降低多位Σ-ΔADC对DAC非线性的灵敏度
5. A multibit reference feedback sigma-delta modulator for radio receivers. [D] . Kuang, Wensheng V. 2007

机译：用于无线电接收机的多位参考反馈sigma-delta调制器。
6. A High-Dynamic-Range Switched-Capacitor Sigma-Delta ADC for Digital Micromechanical Vibration Gyroscopes [O] . Risheng Lv, Weiping Chen, Xiaowei Liu 2018

机译：用于数字微机械振动陀螺仪的高动态范围开关电容Sigma-Delta ADC
7. A 1.2-V 165-μW 0.29-mm² Multibit Sigma-Delta ADC for Hearing Aids Using Nonlinear DACs and With Over 91 dB Dynamic-Range [O] . Custódio José R., Goes João, Paulino Nuno, 2013

机译：1.2 V 165-μW0.29-mm²多位Σ-Δ型aDC，用于使用非线性DaC并具有超过91 dB动态范围的助听器

A multibit sigma-delta ADC for multimode receivers

摘要

著录项

相似文献

相关主题

期刊订阅