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首页> 外文期刊>IEEE Journal of Solid-State Circuits >Second-order intermodulation mechanisms in CMOS downconverters
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Second-order intermodulation mechanisms in CMOS downconverters

机译：CMOS下变频器中的二阶互调机制

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摘要

An in-depth analysis of the mechanisms responsible for second-order intermodulation distortion in CMOS active downconverters is proposed in this paper. The achievable second-order input intercept point (IIP2) has a fundamental limit due to nonlinearity and mismatches in the switching stage and improves with technology scaling. Second-order intermodulation products generated by the input transconductor or due to self-mixing usually contribute to determine the IIP2 even though they can, at least in principle, be eliminated. The parasitic capacitance loading the switching-stage common source plays a key role in the intermodulation mechanisms. Moreover, the paper shows that, besides direct conversion and low intermediate frequency (IF), even superheterodyne receivers can suffer from second-order intermodulation if the IF is not carefully chosen. The test vehicle to validate the proposed analysis is a highly linear 0.18-Μm direct-conversion CMOS mixer, embedded in a fully integrated receiver, realized for Universal Mobile Telecommunications System applications.
机译：本文对CMOS有源下变频器中引起二阶互调失真的机理进行了深入分析。由于非线性和开关级的失配，可实现的二阶输入截取点（IIP2）具有基本限制，并且会随着技术规模的提高而提高。尽管至少在原理上可以消除IIP2，但由输入跨导体产生的二阶互调产物或由于自混合而产生的二阶互调产物通常有助于确定IIP2。负载在开关级公共源上的寄生电容在互调机制中起着关键作用。此外，本文表明，如果不仔细选择中频，除了直接转换和低中频（IF）之外，即使是超外差接收机也可能遭受二阶互调。用来验证所提出分析的测试工具是高度线性的0.18μm直接转换CMOS混频器，该混频器嵌入完全集成的接收器中，适用于通用移动电信系统应用。

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