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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A novel transistor model for simulating avalanche-breakdown effects in Si bipolar circuits
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A novel transistor model for simulating avalanche-breakdown effects in Si bipolar circuits

机译:用于模拟硅双极电路中雪崩击穿效应的新型晶体管模型

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摘要

A physics-based scalable transistor model is described which allows accurate consideration of avalanche-breakdown effects in bipolar circuit simulation. The three-dimensional model consists of six lumped transistor elements, which are connected via elements of the base and emitter-contact resistance. Analytical relations are given to calculate the elements of this six-transistor model (6TM) for arbitrary emitter dimensions from measured area- and length-specific transistor parameters. As a core of the transistor elements, all kinds of conventional transistor models can be used provided an adequate avalanche current source is implemented between the internal collector and base nodes. The validity of this 6TM has been verified under dc and fast transient conditions by simulations and measurements.
机译:描述了基于物理的可伸缩晶体管模型,该模型允许在双极电路仿真中准确考虑雪崩击穿效应。三维模型由六个集总晶体管元件组成,它们通过基极和发射极接触电阻元件连接。给出了分析关系,以便根据所测量的面积和长度特定的晶体管参数,针对任意发射极尺寸来计算此六晶体管模型(6TM)的元素。作为晶体管元件的核心,可以在内部集电极和基极节点之间实现足够的雪崩电流源的情况下,使用所有常规晶体管模型。通过仿真和测量,已经在直流和快速瞬态条件下验证了该6TM的有效性。

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