...
首页> 外文期刊>IEEE Journal of Solid-State Circuits >An ultralow-power UHF transceiver integrated in a standard digitalCMOS process: architecture and receiver
【24h】

An ultralow-power UHF transceiver integrated in a standard digitalCMOS process: architecture and receiver

机译:集成在标准digitalCMOS工艺中的超低功耗UHF收发器:架构和接收器

获取原文
获取原文并翻译 | 示例
           

摘要

A broad range of high-volume consumer applications requirenlow-power battery-operated wireless microsystems and sensors. Thesensystems should conciliate a sufficient battery lifetime with reducedndimensions, low cost, and versatility. Their design highlights thentradeoff between performance, lifetime, cost, and power consumption.nAlso, special circuit and design techniques are needed to comply withnthe reduced supply voltage (down to 1 V, for single battery cellnoperation). These considerations are illustrated by the design of anprototype receiver chip realized in a standard 0.5-Μm digital CMOSnprocess with 0.6-V threshold voltage. The chip is dedicated to andistributed sensors network and is based on a direct-conversionnarchitecture. The circuit operates at 1-V power supply in the 434-MHznEuropean ISM band and consumes only 1 mW in receive mode. It achieves an-95 dBm sensitivity for a data rate of 24 kb/s
机译:大量的大容量消费类应用需要低功率电池供电的无线微系统和传感器。传感器系统应以减少的尺寸,低成本和多功能性来协调足够的电池寿命。他们的设计强调了性能,寿命,成本和功耗之间的折衷。此外,还需要特殊的电路和设计技术来满足降低的电源电压(对于单节电池,工作电压低至1 V)。这些考虑通过原型接收器芯片的设计来说明,该芯片在具有0.6V阈值电压的标准0.5μm数字CMOSn工艺中实现。该芯片专用于分布式传感器网络,基于直接转换架构。该电路在434MHz欧洲ISM频段中以1V电源供电,在接收模式下仅消耗1mW的功率。它以24 kb / s的数据速率实现95 dBm的灵敏度

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号