...
首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 0.6-2.5-GBaud CMOS tracked 3 × oversampling transceiverwith dead-zone phase detection for robust clock/data recovery
【24h】

A 0.6-2.5-GBaud CMOS tracked 3 × oversampling transceiverwith dead-zone phase detection for robust clock/data recovery

机译:一个0.6-2.5GBaud CMOS跟踪3×过采样收发器,具有死区相位检测功能,可实现可靠的时钟/数据恢复

获取原文
获取原文并翻译 | 示例
           

摘要

For generation of the multiphase clocks for a serializer, anwide-range multiphase delay-locked loop (DLL) is used in the transmitternto avoid the detrimental characteristics of a phase-locked loop (PLL),nsuch as jitter peaking and accumulated phase error. A tracked 3 ×noversampling technique with dead-zone phase detection is incorporated innthe receiver for robust clock/data recovery in the presence of excessivenjitter and intersymbol interference (ISI). Due to the dead-zone phasendetection, phase adjustment is performed only on the tail portions ofnthe transition histogram in the received data eye, thereby exhibitingnwide pumping-current range, large jitter tolerance, and small phasenerror. A voltage-controlled oscillator (VCO), based on a folded starvedninverter, shows about 50% less jitter than one with replica bias. Thentransceiver, implemented in 0.25-Μm CMOS technology, operates at 2.5nGBaud over a 10-m 150-Ω STP cable and at 1.25 GBaud over a 25-mncable with a bit error rate (BER) of less than 10-13
机译:为了生成串行器的多相时钟,在发射器中使用了宽范围的多相延迟锁定环(DLL),以避免诸如抖动峰值和累积相位误差之类的锁相环(PLL)的有害特性。接收机中采用了具有盲区相位检测功能的跟踪3×采样采样技术,可在出现过多抖动和符号间干扰(ISI)的情况下实现可靠​​的时钟/数据恢复。由于死区相位检测,仅对接收到的数据眼中过渡直方图的尾部执行相位调整,从而呈现出宽泛的泵浦电流范围,较大的抖动容限和较小的相位误差。基于折叠式饥饿逆变器的压控振荡器(VCO)的抖动比带有复制偏置的振荡器低约50%。然后,以0.25-μmCMOS技术实现的收发器在10-m150-ΩSTP电缆上的工作速率为2.5nGBaud,在25-mncable上的工作速率为1.25GBaud,误码率(BER)小于10-13

著录项

相似文献

  • 外文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号