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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A CMOS delta-sigma true RMS converter
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A CMOS delta-sigma true RMS converter

机译：CMOS delta-sigma真RMS转换器

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摘要

Conventionally, monolithic electronics true rms converters are constructed by bipolar circuitry. This paper describes a new architecture based on delta-sigma (/spl Delta//spl Sigma/) modulation to realize a low-cost rms converter in CMOS technologies, especially intended for handheld digital multimeters. The signal-to-quantization noise ratio as well as transfer characteristics of this architecture have been deduced to obtain initial design parameters. The use of an indirect charge transfer technique makes the converter gain depend only on an on-chip capacitor ratio, reducing gain drift and offering good gain accuracy. Measured results show that this converter achieves a signal-to-noise ratio of 88 dB and a relative error of /spl plusmn/0.2% for arbitrary inputs with a signal crest factor up to three. The signal bandwidth exceeds 50 kHz, and the full-scale input range is greater than 0.4 V/sub rms/. Without trimming and calibration, this converter has an absolute gain error less than /spl plusmn/0.4%. This chip is fabricated in a 0.8-/spl mu/m double-poly, double-metal CMOS process and occupies active area of 1 mm/sup 2/.
机译：通常，单片电子真均方根转换器由双极电路构成。本文介绍了一种基于delta-sigma（/ spl Delta // spl Sigma /）调制的新体系结构，以实现CMOS技术中的低成本均方根转换器，特别适用于手持数字万用表。推导了该架构的信号量化噪声比以及传输特性，以获得初始设计参数。间接电荷转移技术的使用使转换器增益仅取决于片上电容器的比率，从而减少了增益漂移并提供了良好的增益精度。测量结果表明，对于信号波峰因数最高为3的任意输入，该转换器可实现88 dB的信噪比和/ spl plusmn / 0.2％的相对误差。信号带宽超过50 kHz，并且满量程输入范围大于0.4 V / sub rms /。无需微调和校准，该转换器的绝对增益误差小于/ spl plusmn / 0.4％。该芯片采用0.8- / splμm/ m的双多晶硅双金属CMOS工艺制造，占用的有效面积为1 mm / sup 2 /。

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