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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 1-V 6-b 50-MSamples/s current-interpolating CMOS ADC
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A 1-V 6-b 50-MSamples/s current-interpolating CMOS ADC

机译:一个1V 6-b 50MSamples / s电流内插CMOS ADC

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摘要

CMOS analog-to-digital converters (ADC's) require eithernbootstrapping techniques or low-threshold devices to function at lownsupply voltages. A 6-b 50-MSamples/s ADC in normal-threshold CMOSnoperates with a single battery cell as low as 0.9 V withoutnbootstrapping. A current-interpolation approach is taken to configure an1-V ADC system that does not allow more than one VGS plus onenVDSsat between the supply rails. The prototype takes anrail-to-rail input and works with a single system clock. The chipnfabricated in 0.35-Μm CMOS occupies an area of 2.4×2 mm2n and consumes 10 mW each in analog and digital supplies
机译:CMOS模数转换器(ADC)需要自举技术或低阈值器件,以在低电源电压下工作。具有正常阈值CMOS的6-b 50-MSamples / s ADC可以在单个电池低至0.9 V的情况下正常工作。采用电流插值方法来配置1-V ADC系统,该系统不允许在电源轨之间使用多个VGS和onenVDSsat。该原型采用轨到轨输入,并使用单个系统时钟。用0.35-μmCMOS制成的芯片占地2.4×2 mm2n,在模拟和数字电源中每个消耗10 mW

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