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Widely programmable high-frequency continuous-time filters indigital CMOS technology

机译:广泛可编程的高频连续时间滤波器,采用数字CMOS技术

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摘要

We present design considerations for programmable high-frequencyncontinuous-time filters implemented in standard digital CMOS processes.nTo reduce area, accumulation MOS capacitors are used as integratingnelements. The filter design problem is examined from the viewpoint ofnprogrammability. To allow frequency scalability without deterioration ofnnoise performance and of the frequency response shape, we employ antechnique called “constant-capacitance scaling,” whichnassures that even parasitic capacitances remain invariant whenntransconductors are switched in and out of the filter. This technique isnapplied to the design of a programmable fourth order Butterworthncontinuous-time filter with a bandwidth programmable from 60 to 350 MHznimplemented in a 0.25-Μm digital CMOS process. The filter has andynamic range of 54 dB, dissipates 70 mW from a 3.3-V supply, andnoccupies an area of 0.15 mm2
机译:我们提出了在标准数字CMOS工艺中实现的可编程高频连续时间滤波器的设计注意事项。为了减小面积,累积MOS电容器被用作集成元件。从可编程性的角度研究了滤波器的设计问题。为了在不降低噪声性能和频率响应形状的情况下实现频率可扩展性,我们采用了一种称为“恒定电容定标”的技术,该技术可确保在将n个跨导体切入和切出滤波器时,即使寄生电容也保持不变。这项技术适用于在0.25-μm数字CMOS工艺中实现的可编程四阶巴特沃斯连续时间滤波器的设计,其带宽可在60至350 MHz范围内实现。滤波器的动态范围为54 dB,从3.3V电源耗散70 mW,占用面积0.15 mm2

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