A BiCMOS analog front-end circuit for an FDM-based ADSL system

Langford D.S.; Tesch B.J.; Williams B.E.; Nelson G.R. Jr.

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A BiCMOS analog front-end circuit for an FDM-based ADSL system

机译：用于基于FDM的ADSL系统的BiCMOS模拟前端电路

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This BiCMOS analog front-end (AFE) integrated circuit contains thenanalog transmit function and a low-noise receiver for FDM-based ADSLnsystems. The IC includes a current steered 14-bit 5-Msps D/A converter,nlaser trimmed third-order reconstruction and anti-alias filters, anprogrammable attenuator with 200-ohm output drive capability, 60-dB ofnRX programmable gain, and a serial interface. Trimmable thin-filmnresistors allow ±4% filter cutoff frequency and absolute gainnaccuracy. The multitone power ratio performance of the part isnapproximately 65 dB with a spurious free dynamic range >70 dBc. ThenCMRR of the RX channel is >90 dB@1.1 MHz. PSRR for transmit andnreceive are greater than 60 dB. The isolation features of the 1.2-ΜmnBiCMOS technology allow transmit and receive to operate in full-duplexnmode with greater than 80 dB of cross-talk isolation. The chip size isn25.8 mm2 which includes bond pads and electrostatic dischargenprotection devices

机译：该BiCMOS模拟前端（AFE）集成电路包含模拟发送功能和用于基于FDM的ADSLn系统的低噪声接收器。该IC包括电流控制的14位5Msps D / A转换器，经过微调的激光三阶重构和抗混叠滤波器，具有200欧姆输出驱动能力的可编程衰减器，60dB的nRX可编程增益以及串行接口。可调整的薄膜电阻器允许±4％的滤波器截止频率和绝对增益精度。该器件的多音功率比性能约为65 dB，无杂散动态范围> 70 dBc。然后，RX通道的CMRR> 90 dB@1.1 MHz。发送和接收的PSRR大于60 dB。 1.2-MmnBiCMOS技术的隔离功能允许发送和接收以大于80 dB的串扰隔离的全双工模式运行。芯片尺寸为25.8 mm2，包括焊盘和静电放电保护装置

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来源
《IEEE Journal of Solid-State Circuits》 |1998年第9期|p.1383-1393|共11页
作者
Langford D.S.; Tesch B.J.; Williams B.E.; Nelson G.R. Jr.;
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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种 eng
中图分类一般性问题;基本电子电路;
关键词
BiCMOS analogue integrated circuits; frequency division multiplexing; subscriber loops; 1.1 MHz; 1.2 micron; ADSL system; BiCMOS analog front-end integrated circuit; CMRR; D/A converter; FDM; PSRR; analog transmit function; anti-alias filter; bond pad; crosstalk isola;

机译：BiCMOS模拟集成电路;频分复用;用户环路;1.1 MHz;1.2微米;ADSL系统;BiCMOS模拟前端集成电路;CMRR;D / A转换器;FDM;PSRR;模拟传输功能;抗混叠滤波器;键合垫;串扰isola;

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专利

1. A BiCMOS analog front-end circuit for an FDM-based ADSL system [J] . Langford D.S., Tesch B.J. IEEE Journal of Solid-State Circuits . 1998,第9期

机译：用于基于FDM的ADSL系统的BiCMOS模拟前端电路
2. A CMOS analog front-end circuit for an FDM-based ADSL system [J] . Zhong-Yuan Chang, Macq D. IEEE Journal of Solid-State Circuits . 1995,第12期

机译：用于基于FDM的ADSL系统的CMOS模拟前端电路
3. An analog BiCMOS integrated circuit for front-end RDS decoder [J] . Baschirotto A., Cassis M. IEEE Transactions on Consumer Electronics . 1991,第3期

机译：前端RDS解码器的模拟BiCMOS集成电路
4. A BiCMOS analog front-end circuit for an FDM-based ADSL system [C] . Langford, D.S., Tesch, . 1997

机译：用于基于FDM的ADSL系统的BiCMOS模拟前端电路
5. Efficient high-performance millimeter-wave front-end integrated circuit designs and techniques in SiGe BiCMOS [D] . Jang, Sun Hwan. 2016

机译：高效高性能毫米波前端集成电路设计和技术在SiGE BICMOS中
6. A Digital Closed-Loop Sense MEMS Disk Resonator Gyroscope Circuit Design Based on Integrated Analog Front-end [O] . Yihang Wang, Qiang Fu, Yufeng Zhang, 2020

机译：基于集成模拟前端的数字闭环传感MEMS磁盘谐振陀螺仪电路设计
7. System-level design and RF front-end implementation for a 3-10ghz multiband-ofdm ultrawideband receiver and built-in testing techniques for analog and rf integrated circuits [O] . Valdes Garcia Alberto 2007

机译：3-10GHz多频带OFDM超宽带接收机的系统级设计和RF前端实现，以及用于模拟和RF集成电路的内置测试技术

A BiCMOS analog front-end circuit for an FDM-based ADSL system

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