This paper describes a new first- and second-order delta-sigma modulator concept where the first integrator is extracted and implemented by a frequency modulator with the modulating signal as the input. The result is a simple delta-sigma modulator with no need for digital-to-analog converters, allowing straightforward multibit quantization. Without the frequency modulator, the circuit becomes a frequency-to-digital converter with delta-sigma noise shaping. An experimental first- and second-order modulator has been implemented in a 1.2-/spl mu/m standard digital CMOS process and the results confirm the theory. For the first-order modulator an input signal amplitude of 150 mV resulted in a signal-to-quantization noise ratio (SQNR) of /spl ap/115 dB at 2 MHz sampling frequency and signal bandwidth of 500 Hz.
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机译：本文介绍了一种新的一阶和二阶delta-sigma调制器概念，其中提取第一积分器并由一个频率调制器以调制信号作为输入来实现。结果是一个简单的delta-sigma调制器，无需数模转换器，可实现直接的多位量化。如果没有频率调制器，电路将成为具有delta-sigma噪声整形的频率数字转换器。实验性一阶和二阶调制器已在1.2- / spl mu / m标准数字CMOS工艺中实现，结果证实了这一理论。对于一阶调制器，输入信号幅度为150 mV，在2 MHz采样频率和500 Hz的信号带宽下，产生的信号量化噪声比（SQNR）为/ spl ap / 115 dB。
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