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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A fully compensated active pull-down ECL circuit with self-adjusting driving capability
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A fully compensated active pull-down ECL circuit with self-adjusting driving capability

机译：具有自调节驱动能力的全补偿有源下拉ECL电路

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摘要

A new active pull-down emitter-coupled logic (ECL) circuit having full compensation against fluctuations in supply voltage and temperature is proposed. This circuit needs no capacitors but a feed-back circuit to adjust its pull-down capability to its load capacitance. The speed performance is compared between the active pull-down ECL circuit and the conventional ECL circuit using 0.8 /spl mu/m SPICE parameters. The active pull-down ECL circuit is twice as fast as the conventional ECL circuit under the load capacitance of 0.8 pF with the same power dissipation. The relation between the power dissipation and the operating frequency is compared among the CMOS, the conventional ECL, and the active pull-down ECL circuits. The comparison adapts a new method in which the circuit parameters are optimized at each operating frequency. The SPICE simulation using this new method shows the conventional ECL circuit has a lower power dissipation than the CMOS circuit, even in the low operating frequency region of 100 MHz. The new active pull-down ECL circuit has the lowest power dissipation among the three circuits. The power dissipation of this circuit shows 47% lower than the CMOS circuit and 29% lower than the conventional ECL circuit at the operating frequency of 600 MHz and the load capacitance of 0.8 pF.
机译：提出了一种新的有源下拉发射极耦合逻辑（ECL）电路，该电路具有针对电源电压和温度波动的完全补偿。该电路不需要电容器，而是需要一个反馈电路来将其下拉能力调整到其负载电容。使用0.8 / spl mu / m SPICE参数比较了有源下拉ECL电路和常规ECL电路的速度性能。有源下拉ECL电路在负载电容为0.8 pF且功耗相同的情况下，是传统ECL电路的两倍。比较了CMOS，常规ECL和有源下拉ECL电路之间的功耗和工作频率之间的关系。比较采用了一种新方法，其中在每个工作频率下优化了电路参数。使用这种新方法进行的SPICE仿真显示，即使在100 MHz的低工作频率范围内，常规ECL电路的功耗也比CMOS电路低。新的有源下拉ECL电路在这三个电路中具有最低的功耗。在600 MHz的工作频率和0.8 pF的负载电容下，该电路的功耗比CMOS电路低47％，比常规ECL电路低29％。

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