...
  • 主题
高级搜索  >
历史搜索 清空历史
首页> 外文期刊>IEEE Journal of Solid-State Circuits >Architecture and circuit design of a 6-GOPS signal processor for QAM demodulator applications
【24h】

Architecture and circuit design of a 6-GOPS signal processor for QAM demodulator applications

机译：用于QAM解调器应用的6-GOPS信号处理器的体系结构和电路设计

获取原文
获取原文并翻译 | 示例
           
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

A QAM processor for applications in QAM demodulators with baud rates of up to 60 Mbaud and modulation schemes of up to 1024 QAM has been implemented on a single chip. The chip performs 11-tap complex-valued adaptive time-domain equalization and the complete digital base-band signal processing of high-capacity QAM demodulators. This includes frequency-domain slope equalization and the digital parts of the timing and carrier recovery as well as the gain and offset control for the A-to-D converters. The equalizer can be operated in baud spaced and half-baud spaced mode and can also be applied for cross-polarization interference cancellation. The computational power of the QAM processor exceeds 6 giga-multiply-accumulate operations per second. Fabricated in an 1.0-/spl mu/m CMOS technology on a silicon area of 185 mm/sup 2/ this 800 K-transistor chip demonstrates the potential of such low-cost technologies. The maximum clock frequency under worst-case conditions is 60 MHz. The corresponding power dissipation is 4.2 W.
机译：已在单个芯片上实现了QAM解调器应用的QAM处理器，其波特率高达60 Mbaud，调制方案高达1024 QAM。该芯片执行11抽头的复数值自适应时域均衡和大容量QAM解调器的完整数字基带信号处理。这包括频域斜率均衡以及定时和载波恢复的数字部分，以及模数转换器的增益和失调控制。均衡器可以在波特间隔和半波特间隔模式下运行，也可以用于交叉极化干扰消除。 QAM处理器的计算能力超过每秒6千兆乘累加运算。该800 K晶体管芯片以1.0- / spl mu / m CMOS技术制造于185 mm / sup 2 /的硅面积上，展示了这种低成本技术的潜力。最坏情况下的最大时钟频率为60 MHz。相应的功耗为4.2W。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号