Continuous and symmetric trans-capacitance compact model for triple-gate junctionless MOSFETs

Oproglidis T. A.; Tsormpatzoglou A.; Tassis D. H.; Theodorou C. G.; Ghibaudo G.; Dimitriadis C. A.

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Continuous and symmetric trans-capacitance compact model for triple-gate junctionless MOSFETs

机译：用于三栅极连接MOSFET的连续和对称跨电容紧凑型模型

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In this work, a continuous and symmetric trans-capacitance compact model for triple-gate junctionless MOSFETs is presented, valid in all regions of operation. Initially, the expressions of the gate, drain and source total charges are analytically derived based on a continuous and symmetric drain current compact model already developed. Then, the intrinsic capacitances are calculated via the differentiation of the terminal charges, verified against TCAD simulation data. The AC symmetry tests of the trans-capacitance compact model are thoroughly investigated.

机译：在这项工作中，提出了一种用于三栅极连接MOSFET的连续和对称的跨电容紧凑型模型，在所有操作区域有效。最初，基于已经开发的连续和对称的漏极电流紧凑型模型来分析栅极，漏极和源总电荷的表达式。然后，通过终端电荷的差异来计算固有电容，验证针对TCAD模拟数据。彻底研究了跨电容紧凑型模型的AC对称性测试。

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来源
《Solid-State Electronics》 |2021年第1期|107945.1-107945.6|共6页
作者
Oproglidis T. A.; Tsormpatzoglou A.; Tassis D. H.; Theodorou C. G.; Ghibaudo G.; Dimitriadis C. A.;
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作者单位

Aristotle Univ Thessaloniki Dept Phys Thessaloniki 54124 Greece;

Aristotle Univ Thessaloniki Dept Phys Thessaloniki 54124 Greece;

Aristotle Univ Thessaloniki Dept Phys Thessaloniki 54124 Greece;

IMEP LAHC Lab Minatec F-38016 Grenoble 16 France;

IMEP LAHC Lab Minatec F-38016 Grenoble 16 France;

Aristotle Univ Thessaloniki Dept Phys Thessaloniki 54124 Greece;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
原文格式 PDF
正文语种 eng
中图分类
关键词
Junctionless triple-gate MOSFETs; Trans-capacitance compact model; AC symmetry tests;

机译：无连接三栅MOSFET;跨电容紧凑型模型;AC对称测试;

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专利

1. Trans-Capacitance Modeling in Junctionless Symmetric Double-Gate MOSFETs [J] . Jazaeri F., Barbut L., Sallese J.-M. IEEE Transactions on Electron Devices . 2013,第12期

机译：无结对称双栅极MOSFET中的跨电容建模
2. Upgrade of Drain Current Compact Model for Nanoscale Triple-Gate Junctionless Transistors to Continuous and Symmetric [J] . Oproglidis T. A., Tsormpatzoglou A., Theodorou C. G., IEEE Transactions on Electron Devices . 2019,第10期

机译：纳米级三栅极无结晶体管的漏极电流紧凑模型升级为连续且对称的
3. 3-D compact model for nanoscale junctionless triple-gate nanowire MOSFETs, including simple treatment of quantization effects [J] . Holtij Thomas, Kloes Alexander, Iniguez Benjamin Solid-State Electronics . 2015,第octa期

机译：用于纳米级无结三栅极纳米线MOSFET的3-D紧凑模型，包括量化效应的简单处理
4. 3-D compact model for nanoscale junctionless triple-gate nanowire MOSFETs [C] . Holtij Thomas, Graef Michael, Kloes Alexander, Proceedings of the 44th European Solid State Device Research Conference . 2014

机译：纳米级无结三栅极纳米线MOSFET的3-D紧凑模型
5. Compact modeling of quantum effects in double gate MOSFETs . [D] . Wang, Wei. 2007

机译：双栅MOSFET量子效应的紧凑模型。
6. A quasi-ballistic drain current charge and capacitance model with positional carrier scattering dependency valid for symmetric DG MOSFETs in nanoscale regime [O] . Vyas R. Murnal, C. Vijaya 2019

机译：具有位置载流子散射相关性的准弹道漏电流电荷和电容模型对纳米级对称DG MOSFET有效
7. Compact Modeling of Symmetrical Double-Gate MOSFETs Including Carrier Confinement and Short-Channel Effects [O] . Munteanu Daniela, Autran Jean Luc, Loussier Xavier, 2009

机译：对称双栅MOSFET的紧凑模型，包括载流子限制和短沟道效应
8. Compact Modeling of the Dynamic Behaviour of MOSFETS [R] . Smedes, T. 1991

机译：mOsFETs动态特性的紧凑建模

Continuous and symmetric trans-capacitance compact model for triple-gate junctionless MOSFETs

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