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机译:新型T形源极/漏极扩展(T-SSDE)栅极下重叠GAA MOSFET,具有增强的亚阈值模拟/ RF性能,适用于低功耗应用
Semiconductor Device Research Laboratory, Department of Electronic Science, University of Delhi, New Delhi 110021, India;
Department of Physics, Motilal Nehru College, University of Delhi, New Delhi 110021, India;
Semiconductor Device Research Laboratory, Department of Electronic Science, University of Delhi, New Delhi 110021, India;
Department of Electronics and Communication Engineering, Maharaja Agrasen Institute of Technology, New Delhi 110086, India;
Gate All Around (GAA) MOSFET; Short channel effects (SCEs); Source/Drain Extension; Underlap Gate;
机译:具有不对称源极/漏极扩展的叠底DG FET的亚阈值模拟/ RF性能
机译:具有高kk垫片的低密度DG FET亚阈值模拟/ RF性能增强,适用于低功耗应用
机译:纳米级双栅SOI MOSFET中的源/漏扩展区工程:适用于低压模拟应用的新颖设计方法
机译:具有非经典栅极-源极/漏极下重叠沟道设计的100 nm以下SOI MOSFET的模拟/ RF性能
机译:平面源极袋(PSP)隧道MOSFET:适用于低功耗应用并改善隧道MOSFET性能的潜在器件解决方案。
机译:基于射频/模拟电路的非对称漏极扩展Dual-kk Trigate叠底FinFET
机译:基于射频/模拟电路的非对称漏极延伸双kk负载欠载FinFET