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Compact modeling of STT-MTJ devices

机译:STT-MTJ设备的紧凑建模

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摘要

STT-MTJ is a promising device for future high-density and low-power integrated systems. To enable design exploration of STT-MTJ, this paper presents a fully compact model for efficient SPICE simulation. Derived from the fundamental LLG equation, the new model consists of RC elements that are compact equations of device geometry and material properties. They support transient SPICE simulations, providing necessary details beyond the macromodel and enable resilient memory design. The accuracy of the model is validated with numerical results and published data. Scaling analysis shows the sensitivity of STT-MTJ to its geometry. We also did variability analysis with Monte Carlo simulation of the basic 1T1MTJ memory cell to study the bit error rate performance for different transistor size and programming current profile. We show that there is a tradeoff between programming energy and cell area for the same bit error rate constraint. Finally we derive the cell size that achieves minimum energy consumption for a given bit error rate constraint (primary) and latency or area constraint (secondary).
机译:STT-MTJ是用于未来高密度和低功率集成系统的有前途的设备。为了进行STT-MTJ的设计探索,本文提出了一种用于高效SPICE仿真的完全紧凑的模型。从基本的LLG方程派生,新模型由RC元素组成,这些RC元素是器件几何形状和材料特性的紧凑方程式。它们支持瞬态SPICE仿真,提供了超出宏模型的必要细节,并支持弹性内存设计。该模型的准确性已通过数值结果和公开数据进行了验证。缩放分析显示了STT-MTJ对其几何形状的敏感性。我们还使用基本1T1MTJ存储单元的蒙特卡罗模拟进行了变异性分析,以研究不同晶体管尺寸和编程电流曲线的误码率性能。我们表明,对于相同的误码率约束,在编程能量和单元面积之间存在折衷。最后,我们得出在给定的误码率限制(主要)和等待时间或区域限制(次要)下实现最小能耗的小区大小。

著录项

  • 来源
    《Solid-State Electronics》 |2014年第12期|76-81|共6页
  • 作者单位

    School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ 85287, USA;

    School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ 85287, USA;

    School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ 85287, USA;

    School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ 85287, USA;

    School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ 85287, USA;

    School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ 85287, USA;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Memory; Compact model; STT-MTJ;

    机译:记忆;紧凑型;STT-MTJ;

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