Analytical threshold voltage model with TCAD simulation verification for design and evaluation of tri-gate MOSFETs

Yawei Jin; Chang Zeng; Lei Ma; Doug Barlage

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Analytical threshold voltage model with TCAD simulation verification for design and evaluation of tri-gate MOSFETs

机译：具有TCAD仿真验证的分析阈值电压模型，用于三栅极MOSFET的设计和评估

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The dynamics of the threshold voltage calculation is evaluated for the tri-gate architecture of device. The 3-D poisson's equation with eight boundary conditions is solved analytically and an analytical threshold model for tri-gate Si MOSFET device is developed. TCAD simulation result of the same device structure is also presented and it agrees well with our threshold analytical model. Furthermore, this analytical threshold model is capable of doing rudimentary first order comparisons of the threshold voltage with respect to device dimensions and semiconductor material type.

机译：针对器件的三栅极架构评估了阈值电压计算的动态性。通过解析求解具有八个边界条件的3-D泊松方程，并建立了三栅Si MOSFET器件的分析阈值模型。还给出了相同器件结构的TCAD仿真结果，并且与我们的阈值分析模型非常吻合。此外，该分析阈值模型能够对器件尺寸和半导体材料类型进行阈值电压的基本一阶比较。

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来源
《Solid-State Electronics》 |2007年第3期|p.347-353|共7页
作者
Yawei Jin; Chang Zeng; Lei Ma; Doug Barlage;
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作者单位

Electrical and Computer Engineering, North Carolina State University, Raleigh, NC, USA;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
原文格式 PDF
正文语种 eng
中图分类一般性问题;
关键词
MOSFET; device modeling; analytical models; threshold voltage; double gate; FinFET; tri-gate; triple gate; undoped; inversion; TCAD simulation;

机译：MOSFET;器件建模;分析模型;阈值电压;双栅极;FinFET;三栅极;三栅极;无掺杂;反演;TCAD模拟;

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1. Analytical threshold voltage model for lightly doped short-channel tri-gate MOSFETs [J] . A. Tsormpatzoglou, D.H. Tassis, CA Dimitriadis, Solid-State Electronics . 2011,第1期

机译：轻掺杂短沟道三栅MOSFET的分析阈值电压模型
2. Analytical Threshold Voltage Model Including Effective Conducting Path Effect (ECPE) for Surrounding-Gate MOSFETs (SGMOSFETs) With Localized Charges [J] . Yu Y. S., Cho N., Hwang S. W., Electron Devices, IEEE Transactions on . 2010,第11期

机译：包括有效电荷路径效应（ECPE）的分析阈值电压模型，用于带局部电荷的环绕栅MOSFET（SGMOSFET）
3. Analytical Modeling of Threshold Voltage and Drain-Induced-Barrier- Lowering Variations Due to Gate Length Fluctuation in Nanometer MOSFETs [J] . Lü Weifeng, Wang Guangyi, Lin Mi, Recent advances in electrical & electronic engineering . 2017,第2期

机译：纳米MOSFET中栅极长度波动引起的阈值电压和漏极沟槽降低变化的分析建模
4. Analytical threshold voltage model for design and evaluation of tri-gate MOSFETs [C] . Zeng, C., Barlage, . 2003

机译：用于三栅极MOSFET设计和评估的分析阈值电压模型
5. Comparative Analysis of Simulation of Trap Induced Threshold Voltage Fluctuations for 45 nm Gate Length n-MOSFET and Analytical Model Predictions. [D] . Ashraf, Nabil Shovon. 2011

机译：45 nm栅极长度n-MOSFET陷阱引起的阈值电压波动仿真的比较分析和分析模型预测。
6. Empirical and Theoretical Modeling of Low-Frequency Noise Behavior of Ultrathin Silicon-on-Insulator MOSFETs Aiming at Low-Voltage and Low-Energy Regime [O] . Yasuhisa Omura 2019

机译：面向低电压低能耗的超薄绝缘体上硅MOSFET低频噪声行为的经验和理论模型
7. An Analytical Model for the Threshold Voltage of Short-Channel Double-Material-Gate (DMG) MOSFETs with a Strained-Silicon (s-Si) Channel on Silicon-Germanium (SiGe) Substrates [O] . Bhushan Shiv 2013

机译：硅锗（SiGe）衬底上带有应变硅（s-Si）沟道的短沟道双材料栅极（DMG）MOSFET阈值电压的分析模型
8. Random Dopant Threshold Voltage Fluctuations in 50 nm Epitaxial Channel MOSFETs: A 3D 'Atomoc' Simulation Study [R] . Asenov, Asen 2000

机译：50 nm外延通道mOsFET中的随机掺杂阈值电压波动：3D'原子'模拟研究

Analytical threshold voltage model with TCAD simulation verification for design and evaluation of tri-gate MOSFETs

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