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首页> 外文期刊>IEEE transactions on very large scale integration (VLSI) systems >Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures
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Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures

机译:粗粒度可重构体系结构的能源与性能权衡的互连探索

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摘要

Modern portable embedded devices require processors that can provide sufficient performance for demanding multimedia and wireless applications. At the same time they have to be flexible to support a wide range of products and extremely energy efficient to provide a long battery life. Coarse Grained Reconfigurable Architectures (CGRAs) potentially meet these constraints by providing a mix of flexible computational resources and large amounts of programmable interconnect. The vast design space of CGRAs complicates the development of optimized processors. Most effort has been spent on improving the performance. However, the energy cost of the programmable interconnect is becoming more expensive and this cost can no longer be neglected. In this work we present an energy- and performance-aware exploration for the interconnect of a CGRA and show that important tradeoffs can be made for those metrics. This will enable designers to develop more efficient architectures, tuned to a targeted application domain.
机译:现代便携式嵌入式设备要求处理器能够为要求苛刻的多媒体和无线应用提供足够的性能。同时,它们必须具有灵活性以支持多种产品,并且必须具有极高的能效,以提供较长的电池寿命。粗粒度可重构体系结构(CGRA)通过提供灵活的计算资源和大量的可编程互连的组合,有可能满足这些约束。 CGRA的巨大设计空间使优化处理器的开发变得复杂。大部分精力都花在了改善性能上。然而,可编程互连的能量成本变得越来越昂贵,并且该成本不再能够被忽略。在这项工作中,我们提出了有关CGRA互连的能源和性能感知的探索,并表明可以为这些指标做出重要的权衡。这将使设计人员能够开发出更有效的体系结构,以适应目标应用领域。

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