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From application descriptions to hardware in seconds: a logic-based approach to bridging the gap

机译:从应用程序描述到硬件,只需几秒钟:一种基于逻辑的方法来弥合差距

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This paper presents a high-level hardware description environment developed at Queen's University, Belfast, U.K., which aims to bridge the gap between application design and hardware description. The environment, called application-to-hardware (A2H), allows for efficient compilation of high-level application descriptions to field programmable gate array (FPGA) hardware in the form of EDIF netlist in seconds. A key concept in bridging the gap while retaining the hardware efficiency, is that of hardware skeletons. A hardware skeleton is a parameterized description of a task-specific architecture, to which the user can supply not only value parameters but also functions or even other skeletons. A skeleton contains built-in rules, which capture optimizations specific to the target hardware at the implementation phase. The rule-based logic programming language Prolog has been chosen as the base notation for the A2H environment. This paper includes descriptions of hardware skeletons abstractions in the particular context of image processing applications. The current implementation of our system targets Xilinx XC4000 and Virtex series FPGAs.
机译:本文介绍了由英国贝尔法斯特女王大学开发的高级硬件描述环境,旨在弥补应用程序设计和硬件描述之间的差距。这种称为“应用程序到硬件”(A2H)的环境允许在几秒钟内以EDIF网表的形式将高级应用程序描述高效地编译到现场可编程门阵列(FPGA)硬件。在保持硬件效率的同时弥合差距的一个关键概念是硬件框架。硬件框架是特定于任务的体系结构的参数化描述,用户不仅可以向其提供值参数,还可以提供功能甚至其他框架。框架包含内置规则,这些规则捕获在实施阶段针对目标硬件的优化。已选择基于规则的逻辑编程语言Prolog作为A2H环境的基本符号。本文介绍了在图像处理应用程序特定上下文中的硬件框架抽象。我们系统的当前实现针对Xilinx XC4000和Virtex系列FPGA。

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