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Fabrication, characterization and simulation of high performance Si nanowire-based non-volatile memory cells

机译：高性能基于硅纳米线的非易失性存储单元的制作，表征和仿真

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摘要

We report the fabrication, characterization and simulation of Si nanowire SONOS-like non-volatile memory with HfO_2 charge trapping layers of varying thicknesses. The memory cells, which are fabricated by self-aligning insitu grown Si nanowires, exhibit high performance, i.e. fast program/erase operations, long retention time and good endurance. The effect of the trapping layer thickness of the nanowire memory cells has been experimentally measured and studied by simulation. As the thickness of HfO_2 increases from 5 to 30nm, the charge trap density increases as expected, while the program/erase speed and retention remain the same. These data indicate that the electric field across the tunneling oxide is not affected by HfO_2 thickness, which is in good agreement with simulation results. Our work also shows that the Omega gate structure improves the program speed and retention time for memory applications.
机译：我们报告了具有不同厚度的HfO_2电荷俘获层的Si纳米线SONOS样非易失性存储器的制造，表征和仿真。通过自对准原位生长的Si纳米线制造的存储单元表现出高性能，即快速的编程/擦除操作，长的保留时间和良好的耐久性。纳米线存储单元的俘获层厚度的影响已经通过实验测量并通过仿真研究。当HfO_2的厚度从5nm增加到30nm时，电荷陷阱密度如预期的那样增加，而编程/擦除速度和保留时间保持不变。这些数据表明，穿过隧穿氧化物的电场不受HfO_2厚度的影响，这与模拟结果非常吻合。我们的工作还表明，Omega门结构提高了存储器应用程序的编程速度和保留时间。

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