DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning

Donghyeon Han; Jinsu Lee; Hoi-Jun Yoo

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DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning

机译：DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning

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摘要

A deep neural network (DNN) learning processor, DF-LNPU, is proposed for fast online learning by utilizing direct feedback alignment (DFA). The proposed processor develops the pipelined DFA (PDFA) and shows 1.75–3.05&inline-formula& &tex-math notation="LaTeX"&$times $ &/tex-math&&/inline-formula& faster DNN learning speed compared with the previous processors. The processor consists of two different types of core. Due to the heterogeneous characteristics, the DF-LNPU shows higher area and energy efficiency than the homogeneous approach. Besides, inter-core and intra-core pipeline is constructed for high-speed online learning and reduces the overall processing time by 42.8–68.4%. Finally, the direct error propagation core (DEPC) is proposed with the built-in pseudorandom number generator (PRNG). The DEPC adopts binarized DFA and organizes the adder-only computing units to maximize computation efficiency. The PRNG-based backward weight generation reduces overall external memory access by 42.8%, and adder-only error computation improves the area and energy efficiency by 35.0% and 14.3%, respectively. The DF-LNPU is implemented in 65-nm CMOS technology, and it can be operated from 0.7-to-1.1-V supply voltage with a maximum frequency of 200 MHz. PDFA-based computing enables 80.94-OP/KB throughput per memory bandwidth, which is the best figure compared with the back-propagation dependent learning processors. The functionality of the DF-LNPU was successfully demonstrated on the verification system using an MDNet-based object tracking application.

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《IEEE Journal of Solid-State Circuits》 |2021年第5期|1630-1640|共11页
作者
Donghyeon Han; Jinsu Lee; Hoi-Jun Yoo;
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作者单位

School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种英语
中图分类基本电子电路;
关键词
Training; System-on-chip; Handheld computers; Inference algorithms; Throughput; Pipelines; Convolution; Deep neural network (DNN); heterogeneous core architecture; online learning; pipelined direct feedback alignment (DFA); pseudorandom number generator (PRNG);

DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning

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