This paper proposes a low-power effective memorysize expanded ternary content addressable memory (TCAM). The IP address of IPv6 extends to 128 bits, where the prefix bits store '0' or '1' and the remaining bits store 'X' (don't care). Most prefixes are much shorter than 128 bits, so many TCAM cells store 'X'. The proposed data-relocation TCAM (DR-TCAM) increases the number of IP addresses stored in the TCAM by relocating the data in the prefix bits into 'X' cells. The DR-TCAM has four types of banks. The type-0 bank is empty and inactivated. The type-1 and type-2 banks store four 32 bit words and two 64 bit words instead of a 128 bit word in the type-3 bank, respectively. Therefore, the type-1 and type-2 banks store four and two times larger IP addresses, respectively. In the simulation, the area and power consumption of the DR-T CAM decreased to 34% and 36% of those of the conventional TCAM for 4 K IP addresses, respectively. The DR-T CAM chip with 256 x 128 bit TCAM cells and 8 banks was fabricated using a 1.2 V 0.13 gm CMOS process. Its area was 0.87 mm(2). Its energy/bit/search was 1.3 fJ at 200 MHz clock frequency when 4 banks were activated to store 256 IP addresses.
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