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Staggered Gain for 100+ GHz Broadband Amplifiers

机译:Staggered Gain for 100+ GHz Broadband Amplifiers

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摘要

A broadband amplifier is realized with cascaded stagger-tuned stages that are equalized for high bandwidth and low gain ripple. The staggered frequency response is demonstrated to improve the transimpedance limit of active circuits. The staggered response is demonstrated with a Darlington feedback amplifier and a constructive wave amplifier, which achieves low group delay. The broadband amplifier is implemented in a 0.12-$mu{hbox {m}}$ SiGe BiCMOS process and achieves a 3-dB bandwidth of 102 GHz. The gain is 10 dB with 1.5-dB gain-ripple and group-delay variation under $pm$6 ps over the entire 3-dB bandwidth. The chip occupies an area of 0.29 ${hbox {mm}}^{2}$ including the pads and consumes 73 mW from a 2-V supply.

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