A 1.3 nJ/b IEEE 802.11ah TX for IoT applications is presented. A fully-digital polar architecture consisting of an all-digital PLL-based frequency modulator and an AM-retiming ΔΣ switched-capacitor PA (SC-PA) achieves more than 10× power reduction than state-of-the-art OFDM TXs. Several circuit-design techniques such as LSB truncation error feedback are proposed to efficiently pre-process the AM/PM data to improve the TX performance. A design approach of the SC-PA for optimum overall efficiency is introduced. The PLL spur level is reduced to 55 dBc by a switched-capacitor based digital-to-time converter. A dynamic divider is implemented together with a 1.8 GHz oscillator for efficient LO generation. Fabricated in a 40 nm CMOS process, this TX fulfills all the IEEE 802.11ah mandatory-mode PHY requirements with 4.4% EVM and 4.8 dB spectral mask margin, while consuming 7.1 mW from a 1 V supply when delivering 0 dBm output power.
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