A 201.4 GOPS 496 mW Real-Time Multi-Object Recognition Processor With Bio-Inspired Neural Perception Engine

著录项

• 来源
  《IEEE Journal of Solid-State Circuits》 |2010年第1期|共14页
• 作者

  Joo-Young Kim;

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• 作者单位

  Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea;

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• 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
• 原文格式 PDF
• 正文语种 英语
• 中图分类 NULL;
• 关键词

  CMOS integrated circuits; SRAM chips; fuzzy set theory; logic circuits; network-on-chip; neural chips; object recognition; parallel processing; pipeline processing; real-time systems; CMOS process; SIMD processors; bioinspired neural perception engine; biologically inspired neural networks; communication architecture; fuzzy logic circuits; hardware architecture; human-like multiobject perception; intelligent workload estimations; low-power object recognition; multicasting network-on-chip; multiobject recognition algorithm; on-chip SRAM; power 496 mW; real-time multiobject recognition processor; size 0.13 mum; state-of-the-art recognition processor; task pipelining; three-stage pipelined architecture; visual perception; voltage 1.2 V; workload-aware dynamic power management; Multi-casting network-on-chip; multi-object recognition; multimedia processor; neural perception engine;