Dual-Port SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations Under Field-Assistance-Free Condition

Masanori Natsui; Akira Tamakoshi; Hiroaki HonjoToshinari WatanabeTakashi NasunoChaoliang ZhangTakaho TanigawaHirofumi InoueMasaaki NiwaToru YoshidukaYasuo NoguchiMitsuo YasuhiraYitao MaHui ShenShunsuke FukamiHideo SatoShoji IkedaHideo OhnoTetsuo EndohTakahiro Hanyu

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Dual-Port SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations Under Field-Assistance-Free Condition

机译：Dual-Port SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations Under Field-Assistance-Free Condition

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摘要

The development of new functional memories using emerging nonvolatile devices has been widely investigated. Spin-transfer torque magnetoresistive random access memory (STT-MRAM) has become new technology platform to overcome the issue in power consumption of logic for the application from IoT to AI; however, STT-MRAM has a tradeoff relationship between endurance, retention, and access time. This is because the MTJ device used in STT-MRAM is a two-terminal device, and excessive read current for high-speed readout can cause unexpected data writing, or so-called read disturbance. In order to meet the demand for the realization of high-speed nonvolatile memory, the development of new memories based on innovative circuit, device, and integration process is required. In this article, we demonstrate an SOT-MRAM, a nonvolatile memory using MTJ devices with spin-orbit-torque (SOT) switching that have a read-disturbance-free characteristic. The SOT-MRAM fabricated using a 55-nm CMOS process is implemented in a dual-port configuration utilizing a three-terminal structure of the device for realizing a wide bandwidth applicable to high-speed applications. In addition, a read-energy reduction technique called a self-termination scheme is also implemented. Through the measurement results of the fabricated prototype chip, we will demonstrate the proposed SOT-MRAM achieves 60-MHz write and 90-MHz read operations with 1.2-V supply voltage under a magnetic-field-free condition.

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来源
《IEEE Journal of Solid-State Circuits》 |2021年第4期|1116-1128|共13页
作者
Masanori Natsui; Akira Tamakoshi; Hiroaki HonjoToshinari WatanabeTakashi NasunoChaoliang ZhangTakaho TanigawaHirofumi InoueMasaaki NiwaToru YoshidukaYasuo NoguchiMitsuo YasuhiraYitao MaHui ShenShunsuke FukamiHideo SatoShoji IkedaHideo OhnoTetsuo EndohTakahiro Hanyu;
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作者单位

Center for Innovative Integrated Electronic Systems, Tohoku University, Sendai, Japan;

Center for Spintronics Integrated Systems, Tohoku University, Sendai, Japan;

Laboratory for Brainware Systems, Research Institute of Electrical Communication, Tohoku University, Sendai, JapanResearch Institute of Electrical Communication, Tohoku University, Sendai, Japan;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种英语
中图分类基本电子电路;
关键词
Computer architecture; Microprocessors; Magnetic tunneling; Switches; Resistance; Performance evaluation; Nonvolatile memory;

Dual-Port SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations Under Field-Assistance-Free Condition

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