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机译:A 40-mW 7-bit 2.2-GS/s Time-Interleaved Subranging CMOS ADC for Low-Power Gigabit Wireless Communications
Department of Electrical Engineering, University of California, Los Angeles, CA, USA;
Analog-to-digital conversion; CMOS analog integrated circuits; subranging A/D converters; switched capacitor circuits; time-interleaved ADC (TI-ADC);