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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 21-Gb/s Duobinary Transceiver for GDDR Interfaces With an Adaptive Equalizer
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A 21-Gb/s Duobinary Transceiver for GDDR Interfaces With an Adaptive Equalizer

机译:A 21-Gb/s Duobinary Transceiver for GDDR Interfaces With an Adaptive Equalizer

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摘要

In this article, we propose a duobinary transceiver for graphics double-data-rate (GDDR) memory interfaces. The proposed voltage-mode driver complies with the GDDR impedance specifications without sacrificing the ratio of level mismatch (RLM). The quarter-rate time-interleaved successive approximation duobinary receiver (Rx) reduces the forwarded clock frequency and minimizes the capacitive loading of the front-end analog equalizer (EQ). To compensate for the channel loss, the transmitter is composed of a three-tap feed-forward EQ, and the Rx employs a continuous-time linear EQ. Also, an EQ adaptation scheme applicable to duobinary signaling is proposed. The transceiver achieves a 10 ?12 bit error rate at 21 Gb/s with 1.42 mW/Gb.

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