...
  • 主题
高级搜索  >
历史搜索 清空历史
首页> 外文期刊>International journal of unconventional computing >Design Exploration of Threshold Logic in Memory and Experimental Implementation Using Knowm Memristors
【24h】

Design Exploration of Threshold Logic in Memory and Experimental Implementation Using Knowm Memristors

机译：Design Exploration of Threshold Logic in Memory and Experimental Implementation Using Knowm Memristors

获取原文
获取原文并翻译 | 示例
           
页面导航
  • 摘要
  • 著录项
  • 相关主题

摘要

In the context of computing in resistive memories (ReRAM), the implementation of threshold logic gates (TLGs) with memristors has been especially investigated for programable in-memory logic implementations. In this work we focus on two circuit design concepts for threshold logic with memristors: the voltage divider and the voltage adder. We provide an analytical exploration of the impact of the HRS-to-LRS ratio of memristors on the performance of every circuit and highlight the advantages of the voltage adder approach. Through experimental results from a proof-of-concept circuit, implemented using self-directed channel (SDC) memristors by Knowm Inc., we validated the conclusions derived from the theoretical analysis for computational memory structures supporting threshold logic gates. Moreover, we present the design and simulation of a bitline driver and sensing circuitry for a lTlR array, where the proposed threshold logic scheme can seamlessly fit. thus providing solutions towards the development of robust and reliable computational ReRAM modules.

著录项

获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号