Roadmap for Ferroelectric Domain Wall Nanoelectronics

Sharma Pankaj; Moise Theodore S.; Colombo LuigiSeidel Jan

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Roadmap for Ferroelectric Domain Wall Nanoelectronics

机译：Roadmap for Ferroelectric Domain Wall Nanoelectronics

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摘要

Ferroelectric domain walls naturally form at nanoscale interfaces of polar order leading to electronic properties distinct from the bulk that can also be electrically programmed. These nanoscale features currently are being actively explored for the development of agile, low-energy electronics for applications in memory, logic, and brain-inspired neuromorphic computing. In this article, the authors review the state of the art, the latest developments, and outline key device and material challenges, emerging opportunities, and new directions for the accelerated engineering and commercialization of domain wall technology.

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来源
《Advanced functional materials》 |2022年第10期|2110263.1-2110263.16|共16页
作者
Sharma Pankaj; Moise Theodore S.; Colombo LuigiSeidel Jan;
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作者单位

Univ New South Wales, Sch Mat Sci & Engn, Sydney, NSW 2052, Australia|Univ New South Wales, Australian Res Councils Ctr Excellence Future Low, Sydney, NSW 2052, Australia;

Texas Instruments Inc, Dallas, TX 75243 USA;

Univ Texas Dallas, Dept Mat Sci & Engn, Richardson, TX 75080 USA;

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原文格式 PDF
正文语种英语
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关键词
agile electronics; brain-inspired computing; domain wall engineering; ferroelectrics; low energy data storage;

Roadmap for Ferroelectric Domain Wall Nanoelectronics

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