A 40-nm Embedded SG-MONOS Flash Macro for High-End MCU Achieving 200-MHz Random Read Operation and 7.91-Mb/mm2 Density With Charge-Assisted Offset Cancellation Sense Amplifier

Masaya Nakano; Yoshinobu Kaneda; Satoru NakanishiYasumitsu MuraiYosuke TashiroYasuhiko TaitoTomoya OgawaHidenori MitaniTakashi ItoTakashi Kono

首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 40-nm Embedded SG-MONOS Flash Macro for High-End MCU Achieving 200-MHz Random Read Operation and 7.91-Mb/mm2 Density With Charge-Assisted Offset Cancellation Sense Amplifier

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A 40-nm Embedded SG-MONOS Flash Macro for High-End MCU Achieving 200-MHz Random Read Operation and 7.91-Mb/mm2 Density With Charge-Assisted Offset Cancellation Sense Amplifier

机译：A 40-nm Embedded SG-MONOS Flash Macro for High-End MCU Achieving 200-MHz Random Read Operation and 7.91-Mb/mm2 Density With Charge-Assisted Offset Cancellation Sense Amplifier

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摘要

With the expansion of Internet of Things (IoT) by artificial intelligence (AI), there is a strong demand for higher performance, higher intelligence, and lower cost in endpoint devices for crossover area located at the boundary between high-end micro controller unit (MCU) area and low-end micro processor unit (MPU) area, such as home automation, machine vision, robotics, and so on. This article presents a 40-nm embedded split-gate MONOS (SG-MONOS) flash macro with optimized memory array architecture and charge-assisted offset cancellation sense amplifier (CAOC-SA), which achieve high-speed random read operation of 200 MHz and high density of 7.91 Mb/mm 2 suitable for crossover devices.

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来源
《IEEE Journal of Solid-State Circuits》 |2022年第10期|3094-3102|共9页
作者
Masaya Nakano; Yoshinobu Kaneda; Satoru NakanishiYasumitsu MuraiYosuke TashiroYasuhiko TaitoTomoya OgawaHidenori MitaniTakashi ItoTakashi Kono;
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作者单位

Renesas Electronics Corporation, Tokyo, Japan;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种英语
中图分类基本电子电路;
关键词
Timing; Voltage; Transistors; Internet of Things; Ash; Split gate flash memory cells; Memory architecture;

A 40-nm Embedded SG-MONOS Flash Macro for High-End MCU Achieving 200-MHz Random Read Operation and 7.91-Mb/mm2 Density With Charge-Assisted Offset Cancellation Sense Amplifier

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