Study of the DC biasing effect on insertion losses in high-frequency interconnections

Gospodinova M.; Arnaudov R.; Philippov P.Mollov VS.

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Study of the DC biasing effect on insertion losses in high-frequency interconnections

机译：Study of the DC biasing effect on insertion losses in high-frequency interconnections

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The paper deals with an experimental investigation of the behavior of high-frequency Si/SiO2/Al based interconnects when an extra DC bias voltage is applied, by means of which the conductor line changes the surface properties of the semiconductor substrate. By superposing a DC bias to the high-speed signal applied to the line, the insertion losses caused by the semiconductor substrate show a significant decrease over the observed frequency range. In order to study this effect a number of test samples containing several microstrip asymmetric transmission lines were prepared and measured. The obtained results suggest a way of controlling the performance and energy propagation of interconnects on semiconductor substrates. The observed effect can be successfully applied in high-speed blocks with tunable parameters. (C) 2000 Elsevier Science Ltd. All rights reserved. References: 5

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来源
《Microelectronics journal》 |2000年第12期|1009-1014|共6页
作者
Gospodinova M.; Arnaudov R.; Philippov P.Mollov VS.;
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作者单位

Tech Univ Sofia, Fac Comp Syst & Control, Dept Comp Syst, Sofia 1000, Bulgaria, .;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种英语
中图分类微电子学、集成电路（IC）;
关键词
Interconnections; High-frequency effects; Line parameters; Line models; Performance;

Study of the DC biasing effect on insertion losses in high-frequency interconnections

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