A Single-Bit 500 kHz-10 MHz Multimode Power-Performance Scalable 83-to-67 dB DR CT#x0394;#x03A3; for SDR in 90 nm Digital CMOS

Crombez P.; Van der Plas G.; Steyaert M. S. J.Craninckx J.

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A Single-Bit 500 kHz-10 MHz Multimode Power-Performance Scalable 83-to-67 dB DR CT#x0394;#x03A3; for SDR in 90 nm Digital CMOS

机译：A Single-Bit 500 kHz-10 MHz Multimode Power-Performance Scalable 83-to-67 dB DR CT#x0394;#x03A3; for SDR in 90 nm Digital CMOS

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摘要

Wireless environments, high data rates and increased digitization require A/D converters with high dynamic range and large bandwidth at the lowest possible power consumption. A fully flexible continuous-time (CT) $DeltaSigma$ with programmable bandwidth, resolution and power consumption in 1.2 V 90 nm CMOS is presented able to satisfy those demands. By introducing flexibility into the core building blocks, a DR of 67/72/78/83 dB is achieved in maximum performance mode for WLAN, DVB, UMTS and BT for a power consumption of 6.8/5.5/6.4/5.0 mW, respectively. GSM operation is also feasible with a DR of 87 dB. For a given bandwidth, the flexibility allows to obtain the lowest power consumption for a desired performance. The overall energy efficiency is reached with a single-bit ${hbox{CT}}DeltaSigma$ modulator avoiding high speed DEM circuits. Its low power consumption especially for high bandwidths is realized thanks to architecture and circuit level optimization. Linearity enhanced integrators, a threshold configurable comparator enabling loop delay compensation and optimized DAC implementations for jitter and avoiding signal dependency in the feedback pulses due to a large voltage swing are employed to increase the performance. The respective FOM equals 0.24/0.27/0.41/0.85 pJ per conversion.

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《IEEE Journal of Solid-State Circuits》 |2010年第6期|共13页
作者
Crombez P.; Van der Plas G.; Steyaert M. S. J.Craninckx J.;
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authorLink("Crombez, P.");

Crombez, P.;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种英语
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关键词
Continuous-time $DeltaSigma$; flexible; low power; multimode; reconfigurable; software-defined-radio;

A Single-Bit 500 kHz-10 MHz Multimode Power-Performance Scalable 83-to-67 dB DR CT#x0394;#x03A3; for SDR in 90 nm Digital CMOS

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