SleepWalker: A 25-MHz 0.4-V Sub-amp;formula formulatype='inline'amp; amp;img src='/images/tex/16996.gif' alt='hbox {mm}^{2}'amp; amp;/formulaamp; 7-amp;formula formulatype='inline'amp; amp;img src='/images/tex/20556.gif' alt='muhbox {W/MHz}'amp; amp;/formulaamp; Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes

Bol D.; De Vos J.; Hocquet C.Botman F.Durvaux F.Boyd S.Flandre D.Legat J.-D.

首页> 外文期刊>IEEE Journal of Solid-State Circuits >SleepWalker: A 25-MHz 0.4-V Sub-amp;formula formulatype='inline'amp; amp;img src='/images/tex/16996.gif' alt='hbox {mm}^{2}'amp; amp;/formulaamp; 7-amp;formula formulatype='inline'amp; amp;img src='/images/tex/20556.gif' alt='muhbox {W/MHz}'amp; amp;/formulaamp; Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes

【24h】

SleepWalker: A 25-MHz 0.4-V Sub-amp;formula formulatype='inline'amp; amp;img src='/images/tex/16996.gif' alt='hbox {mm}^{2}'amp; amp;/formulaamp; 7-amp;formula formulatype='inline'amp; amp;img src='/images/tex/20556.gif' alt='muhbox {W/MHz}'amp; amp;/formulaamp; Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes

机译：SleepWalker: A 25-MHz 0.4-V Sub-amp;formula formulatype="inline"amp; amp;img src="/images/tex/16996.gif" alt="hbox {mm}^{2}"amp; amp;/formulaamp; 7-amp;formula formulatype="inline"amp; amp;img src="/images/tex/20556.gif" alt="muhbox {W/MHz}"amp; amp;/formulaamp; Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes

获取原文

获取原文并翻译 | 示例

掌桥外文数据库（机构版） >>

开具论文收录证明 >>

文献代查 >>

页面导航

摘要
著录项
相关主题

摘要

Integrated circuits for wireless sensor nodes (WSNs) targeting the Internet-of-Things (IoT) paradigm require ultralow-power consumption for energy-harvesting operation and low die area for low-cost nodes. As the IoT calls for the deployment of trillions of WSNs, minimizing the carbon footprint for WSN chip manufacturing further emerges as a third target in a design-for-the-environment (DfE) perspective. The SleepWalker microcontroller is a 65-nm ultralow-voltage SoC based on the MSP430 architecture capable of delivering increased speed performances at 25 MHz for only 7 $muhbox{W/MHz}$ at 0.4 V. Its $hbox{sub-mm}^{2}$ die area with low external component requirement ensures a low carbon footprint for chip manufacturing. SleepWalker incorporates an on-chip adaptive voltage scaling (AVS) system with DC/DC converter, clock generator, memories, sensor and communication interfaces, making it suited for WSN applications. An LP/GP process mix is fully exploited for minimizing the energy per cycle, with power gating to keep stand-by power at 1.7 $muhbox{W}$. By incorporating a glitch-masking instruction cache, system power can be reduced by up to 52. The AVS system ensures proper 25-MHz operation over process and temperature variations from $-$40 $^circ$C to $+hbox{85 }^{circ}hbox{C}$, with a peak efficiency of the DC/DC converter above 80. Finally, a multi-$V_{t}$ clock tree reduces variability-induced clock skew by 3 $times$ to ensure ro- ust timing closure down to 0.3 V.

著录项

来源
《IEEE Journal of Solid-State Circuits》 |2013年第1期|20-32|共13页
作者
Bol D.; De Vos J.; Hocquet C.Botman F.Durvaux F.Boyd S.Flandre D.Legat J.-D.;
展开▼
作者单位

ICTEAM Institute, Université catholique de Louvain (UCL), Louvain-la-Neuve, Belgium;

展开▼
收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种英语
中图分类基本电子电路;
关键词
Clocks; DC-DC power converters; Delay; Logic gates; System-on-a-chip; Wireless sensor networks; CMOS digital integrated circuits; design for the environment (DfE); near-threshold/subthreshold logic; system-on-chip (SoC); ultralow power; ultralow voltage; variability mitigation;

摘要

著录项

相关主题

期刊订阅