System-level test synthesis for mixed-signal designs

Sule Ozev; Alex Orailoglu

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System-level test synthesis for mixed-signal designs

机译：用于混合信号设计的系统级测试综合

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Hierarchical test approaches are a must for large designs due to the computational complexity and tight time-to-market requirements. In hierarchical test synthesis, test design is conducted at a subsystem level where the design complexity is manageable. For analog systems, tests are generally designed at the basic block level. This paper outlines a tool for translating basic block-level tests into system-level tests for large analog systems. Computational effectiveness is achieved by the use of high level models and by a pre-analysis of the system to identify feasible translation paths. A method to compute the fault and yield coverages of the resultant system-level tests is also provided in order to evaluate the translation. Experimental results show that test translation reduces design for testability overhead significantly while satisfying coverage requirements.

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来源
《IEEE Transactions on Automatic Control》 |2001年第6期|588-599|共12页
作者
Sule Ozev; Alex Orailoglu;
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正文语种英语
中图分类自动化系统;
关键词
Mixed-signal systems; Parameter tolerances; Probabilistic fault coverage; System-level test;

机译：混合信号系统;参数公差;概率故障覆盖率;系统级测试;

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System-level test synthesis for mixed-signal designs

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