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首页> 外文期刊>IEEE Transactions on Automatic Control >Design of low-phase-noise CMOS ring oscillators
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Design of low-phase-noise CMOS ring oscillators

机译:低相位噪声CMOS环形振荡器的设计

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This paper presents a framework for modeling the phase noise in complementary metal-oxide-semiconductor (CMOS) ring oscillators. The analysis considers both linear and nonlinear operations, and it includes both device noise and digital switching noise coupled through the power supply and substrate. In this paper, we show that fast rail-to-rail switching is required in order to achieve low phase noise. Further, flicker noise from the bias circuit can potentially dominate the phase noise at low offset frequencies. We define the effective Q factor for ring oscillators with large and nonlinear voltage swings and predict its increase for CMOS processes with smaller feature sizes. Our phase-noise analysis is validated via simulation and measurement results for ring oscillators fabricated in a number of CMOS processes.
机译:本文提出了一个互补金属氧化物半导体(CMOS)环形振荡器相位噪声建模的框架。该分析考虑了线性和非线性操作,包括通过电源和基板耦合的器件噪声和数字开关噪声。在本文中,我们表明需要快速轨到轨开关才能实现低相位噪声。此外,偏置电路的闪烁噪声可能会影响低失调频率下的相位噪声。我们定义了具有较大和非线性电压摆幅的环形振荡器的有效Q因子,并预测了具有较小特征尺寸的CMOS工艺的有效Q因子。我们的相位噪声分析通过仿真和测量结果对在许多CMOS工艺中制造的环形振荡器进行了验证。

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