After a long design and development, a prototype of the pixel detector front-end chip that will be proposed for the ATLAS and CMS experiments at CERN during HL-LHC has been recently available. It provides data streams using up to four lanes running at 1.28 Gbps each. This paper describes in detail the implementation of a first readout chain of this chip, namely the RD53A, using the current the main ATLAS Phase-II readout board. For this work the readout chain has required dedicated electronics as a hardware interface between the front-end chip and the readout board. Moreover, to maximize the efficiency of testing the chip and to realize the Data AcQuisition (DAQ) chain to be used by Phase-II ATLAS, it is extremely important that, even for the first prototypes, the DAQ chain is as similar as possible to the final one. The implemented chain has been left available at CERN for further tests and developments for the entire ATLAS TDAQ collaboration. This readout chain is proposed as a general readout for Large-Scale Application of pixel detectors. Full details of the prototype and testing performed to date will be presented.
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