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首页> 美国政府科技报告 >Interconnect-Centric Approach for Adapting Voltage and Frequency in Heterogeneous System-on-a-Chip
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Interconnect-Centric Approach for Adapting Voltage and Frequency in Heterogeneous System-on-a-Chip

机译：用于在异构片上系统中调整电压和频率的以互连为中心的方法

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This dissertation proposes a power-aware SoC design methodology, which is characterized by four key elements. First, SoC infrastructure is developed specifically to create modularity in both the physical floorplan, and application. Second, a statically scheduled interconnect approach eases physical design, limits network overhead, and assures predictable interconnect behavior. This interconnect approach is well suited for signal processing applications critical to portable electronics, including video and speech coding, graphics, and cryptography. Third, system modularity is exploited for power savings by allowing the independent development and use of reconfigurable processing cores. Dynamic parameterization is proposed as a formalism for run-time reconfiguration of these cores. Finally, interconnect behavior monitoring is used to estimate core utilization and control individual voltage and frequency scaling for each core.

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