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Design Implementation and Testing of a VLSI High Performance ASIC for Extracting the Phase of a Complex Signal

机译:用于提取复杂信号相位的VLsI高性能asIC的设计实现和测试

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This thesis documents the research, circuit design, and simulation testing of a VLSI ASIC which extracts phase angle information from a complex sampled signal using the arctangent relationship: (phi=tan/-1 (Q/1)). Specifically, the circuit will convert the In-Phase and Quadrature terms into their corresponding phase angle. The design specifications were to implement the design in CMOS technology with a minimum transistor count and ability to operate at a clock frequency of 700 MHz. Research on the arctangent function was performed to determine mathematical calculation methods and the CORDIC method was chosen to achieve the stated design specifications. MATLAB simulations were used to calculate and verify accuracy and to implement Quine- McClusky logic minimization. T-SPICE netlists were generated and simulations were run to determine transistor and circuit electrical operation and timing. Finally, overall circuit logic functionality of all possible input combinations was completed using a VHDL simulation program.

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