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Scalable System Architecture for Use With Free Space Optical Interconnects in a 3-D Stacked Processor Environment

机译:可扩展的系统架构,用于3-D堆叠处理器环境中的自由空间光互连

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This dissertation covers the development of a computer architecture to support synchronous serial communications over free space optical interconnects using the 3-D stacked processor technology. The architecture is based on existing implementations of message passing parallel systems, but adapted for the unique needs of an opto-electronic environment. A novel approach to dynamic clock synchronization over a free-space transmission bus is presented. Development of an architectural specification through identifying the components of a functional description and mapping them to an appropriate network model is outlined. By applying these techniques, the designer has the advantage of field tested solutions to the problems that occur in the development of complex, hybrid, hierarchal opto-electronic architectures and protocols.

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