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Two-Chip Implementation of the RSA Public-Key Encryption Algorithm

机译:Rsa公钥加密算法的双芯片实现

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A system has been developed which employs two identical integrated circuits to perform the encryption algorithm developed by Rivest, Shamir, and Adleman (RSA) on a 336-bit message. The integrated circuit used in the system employs the 3-micron polysilicon gate, radiation-hard, CMOS technology developed at Sandia National Laboratories. (ERA citation 07:063858)

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