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Onboard FPGA-based SAR processing for future spaceborne systems

机译:用于未来星载系统的基于FpGa的板载saR处理

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We present a real-time high-performance and fault-tolerant FPGA-based hardware architecture for the processing of synthetic aperture radar (SAR) images in future spaceborne system. In particular, we will discuss the integrated design approach, from top-level algorithm specifications and system requirements, design methodology, functional verification and performance validation, down to hardware design and implementation.

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