首页> 外国专利> Delay time detecting circuit, hit information generating apparatus and delay time detecting method

Delay time detecting circuit, hit information generating apparatus and delay time detecting method

摘要

Problem to be solved: to provide a device for generating time information of high accuracy by a simple logic circuit.The delay time detecting circuit includes a clock generating section 11, a count section 12, a sub scale signal generating section 13, and a delay time calculating section 14.The clock generator 11 generates a sub scale clock signal based on the system clock signal.The count section 12 generates a count signal while sequentially incrementing the number of preset values based on the sub scale clock signal.The sub scale signal generator 13 receives the count signal, generates a rectangular scale wave corresponding to the second period at a rate of one count, and generates the same number as the number of the side scale signal whose timing is shifted according to the second period.The delay time calculating section 14 receives the input clock signal and calculates a delay time within the first period of the input clock signal with respect to the system clock signal based on a one side scale signal having a timing at which the input clock signal coincides with the input clock signal.Diagram

著录项

  • 公开/公告号JP2020079717A

    专利类型发明专利

  • 公开/公告日2020.05.28

    原文格式PDF

  • 申请/专利号JP2018212047

  • 发明设计人 高橋 正行;

    申请日2018.11.12

  • 分类号

  • 国家 JP

  • 入库时间 2022-08-21 10:56:56

相似文献

  • 专利
  • 外文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号