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Method and framework to dynamically split a testbench into concurrent simulatable multi-processes and attachment to parallel processes of an accelerated platform

摘要

The independent claims of this patent signify a concise description of embodiments. Each component of a testbench configured to test a DUT is associated at compile time with a different hardware transactor. The testbench is partitioned at compile time into a plurality of independent partitioned testbenches, where each independent partitioned testbench comprises at least one component of the testbench. At run time, each of the plurality of partitioned testbenches is simulated in parallel. The simulating of a partitioned testbench includes execution of its at least one component on its at least one associated hardware transactor using the hardware emulation system. This Abstract is not intended to limit the scope of the claims.

著录项

  • 公开/公告号US10719644B2

    专利类型

  • 公开/公告日2020.07.21

    原文格式PDF

  • 申请/专利权人

    申请/专利号US16024363

  • 发明设计人 Amit Sharma;Rohith MS;Prashanth Srinivasa;

    申请日2018.06.29

  • 分类号

  • 国家 US

  • 入库时间 2022-08-21 10:59:26

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