An objective of the present invention is to provide a system for protecting data using an erasure code. Disclosed is a topology. The topology may include a non-volatile memory express (NVMe) solid state drive (SSD), a field programmable gate array (FPGA) to implement one or more functions supporting the NVMe SSD such as data acceleration, data deduplication, data integrity, data encryption, and data compression, and a peripheral component interconnect express (PCIe) switch. The PCIe switch may communicate with the FPGA and the NVMe SSD.
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