首页>
外国专利>
ADAPTATION OF MEMORY CELL STRUCTURE AND FABRICATION PROCESS TO BINARY DATA ASYMMETRY AND BIT-INVERSION TOLERANCE ASYMMETRY IN DEEP LEARNING MODELS
ADAPTATION OF MEMORY CELL STRUCTURE AND FABRICATION PROCESS TO BINARY DATA ASYMMETRY AND BIT-INVERSION TOLERANCE ASYMMETRY IN DEEP LEARNING MODELS
展开▼
机译：深度学习模型中二进制数据不对称和位反转容忍不对称的记忆细胞结构和制造过程适应
展开▼
页面导航
摘要
著录项
相似文献
摘要
This disclosure relates to artificial intelligence (AI) circuits with embedded memory for storing trained AI model parameters. The embedded memory cell structure, device profile, and/or fabrication process are designed to generate binary data access asymmetry and error rate asymmetry between writing binary zeros and binary ones that are adapted to and compatible with a binary data asymmetry of the trained model parameters and/or a bit-inversion tolerance asymmetry of the AI model between binary zeros and ones. The disclosed method and system improves predictive accuracy and memory error tolerance without significantly reducing an overall memory error rate and without relying on memory cell redundancy and error correction codes.
展开▼
