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METHOD FOR SUPPRESSING COMMON-MODE CURRENT OF INTERMEDIATE LINE OF T-SHAPED THREE-LEVEL THREE-PHASE INVERTER

机译：T形三电平三相逆变器中间线共模电流的抑制方法

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摘要

The present invention relates to a method for suppressing common-mode current of neutral line in T-type three-level three-phase inverter, which adopts

<mo>{</mo><mtable><mtr><mtd><mrow><msubsup><mi>V</mi><mi mathvariant="italic">aref</mi><mo>∗</mo></msubsup><mo>=</mo><msub><mi>V</mi><mi mathvariant="italic">aref</mi></msub><mo>+</mo><msub><mi>V</mi><mi mathvariant="italic">offset</mi></msub><mo>−</mo><msub><mi>V</mi><mrow><mi mathvariant="italic">offset</mi><mo>_</mo><mi mathvariant="italic">LC</mi></mrow></msub></mrow></mtd></mtr><mtr><mtd><mrow><msubsup><mi>V</mi><mi mathvariant="italic">bref</mi><mo>∗</mo></msubsup><mo>=</mo><msub><mi>V</mi><mi mathvariant="italic">bref</mi></msub><mo>+</mo><msub><mi>V</mi><mi mathvariant="italic">offset</mi></msub><mo>−</mo><msub><mi>V</mi><mrow><mi mathvariant="italic">offset</mi><mo>_</mo><mi mathvariant="italic">LC</mi></mrow></msub></mrow></mtd></mtr><mtr><mtd><mrow><msubsup><mi>V</mi><mi mathvariant="italic">cref</mi><mo>∗</mo></msubsup><mo>=</mo><msub><mi>V</mi><mi mathvariant="italic">cref</mi></msub><mo>+</mo><msub><mi>V</mi><mi mathvariant="italic">offset</mi></msub><mo>−</mo><msub><mi>V</mi><mrow><mi mathvariant="italic">offset</mi><mo>_</mo><mi mathvariant="italic">LC</mi></mrow></msub></mrow></mtd></mtr></mtable>

as a modulation signal for modulating the T-type three-level three-phase inverter; V_aref, V_bref and V_cref are respectively three-phase conventional sine-wave pulse modulation signals, V_offset is a third-harmonic bias signal of the three-phase conventional sine-wave pulse modulation signals, V_{offset_LC} is a voltage bias signal for suppressing a resonant current of an LC filter from being injected to the modulation signal, V_{offset_LC} = K_f i_{a_high}, K_f is a conversion coefficient for converting current into voltage, and i_{a_high} is a high-frequency component of an output current i_a of an inversion side of the T-type three-level three-phase inverter. The method of the present disclosure can effectively suppress LC filter resonance contained in the currents of a circulation neutral line and inversion side of a inverter, reduce the common-mode leakage current of the inverter, and improve the performance of the inverter.

机译：本发明涉及一种在T型三相三相逆变器中抑制中性线共模电流的方法，该方法采用了

<！[CDATA [{\begin{matrix} Varef*=Varef+{< mi> V}_{偏移量-V偏移量_LCVbref*= < / mo>Vbref+V偏移量-V偏移量_LC< mrow> V} \end{matrix}

著录项

公开/公告号EP3605825A1

专利类型
公开/公告日2020-02-05

原文格式PDF
申请/专利权人 JIANGSU GOODWE POWER SUPPLY TECHNOLOGY CO. LTD.;
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申请/专利号EP20180770797
发明设计人 HUANG MIN;YANG YONG;FANG GANG;LU JINJUN;XIE SHENGREN;
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申请日2018-03-23
分类号H02M7/487;
国家 EP
入库时间 2022-08-21 11:37:59

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