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Semiconductor bridge circuit and method of making a semiconductor bridge circuit

机译:半导体桥电路和制造半导体桥电路的方法

摘要

A half-bridge circuit (400) comprising: a first carrier (401_1), a second carrier (401_2), and a third carrier (401_3); a first power semiconductor chip (402_1) comprising a first major surface and a second major surface opposite the first major surface a source electrode is disposed on the first main surface and the first power semiconductor chip (402_1) is mounted on the first carrier (401_1) such that the second main surface faces the first carrier (401_1) and a drain electrode with the first carrier (401_1) 401_1); a second power semiconductor chip (402_2) comprising a first major surface and a second major surface opposite the first major surface, wherein a source electrode is disposed on the first major surface and the second power semiconductor chip (402_2) is disposed on the second carrier (401_2) that the second main surface faces the second carrier (401_2); terchip (402_3) on the third carrier (401_3) controlling the power semiconductor chips (402_1, 402_2); a contact clip (450) coupled to the first carrier (401_1) and the source of the second power semiconductor chip (402_2) and the drain electrode of the first power semiconductor chip (402_1) electrically connects to the source electrode of the second power semiconductor chip (402_2); an encapsulation body (404) in which the semiconductor chips (402_1, 402_2, 402_3) are embedded; a contact clip formed as an integral part (203), wherein the contact clip (203) comprises: a bonding portion (203_1) bonded to the source electrode of the first power semiconductor chip (402_1); a first portion (203_3) having a first side edge of the contact clip (203) and an external terminal of the half-bridge circuit (400), wherein the external terminal is exposed on the encapsulation body (404); a second portion (233_3) which is one of The second section (233_3) is connected via a bonding layer (461) to an outer connection element (460) configured separately from the supports (401_1, 401_2, 401_3), wherein the second lateral edge of the contact clip () 203) is embedded in the encapsulation body (404) and the outer terminal member (460) is exposed on the encapsulation body; the first lateral edge and the second lateral edge disposed at different heights relative to a lower-side plane of the substrates (401_1, 401_2, 401_3) are.
机译:半桥电路(400),包括:第一载波(401_1),第二载波(401_2)和第三载波(401_3);以及第一功率半导体芯片(402_1)包括第一主表面和与第一主表面相对的第二主表面,在第一主表面上设置有源电极,并且第一功率半导体芯片(402_1)被安装在第一载体(401_1)上),以使第二主表面面对第一载体(401_1),并且漏极与第一载体(401_1)401_1面对);第二功率半导体芯片(402_2),其包括第一主表面和与第一主表面相对的第二主表面,其中,源电极设置在第一主表面上,第二功率半导体芯片(402_2)设置在第二载体上(401_2)第二主表面面对第二载体(401_2);第三载体(401_3)上的terchip(402_3)控制功率半导体芯片(402_1、402_2);连接到第一载体(401_1)和第二功率半导体芯片(402_2)的源极的接触夹(450)和第一功率半导体芯片(402_1)的漏极电连接到第二功率半导体的源极筹码(402_2);封装体(404),其中嵌入了半导体芯片(402_1、402_2、402_3);形成为一体部分(203)的接触夹,其中,接触夹(203)包括:结合部分(203_1),结合到第一功率半导体芯片(402_1)的源电极;第一部分(203_3)具有接触夹(203)的第一侧边缘和半桥电路(400)的外部端子,其中外部端子暴露在封装体(404)上;作为第二部分(233_3)之一的第二部分(233_3)通过粘结层(461)连接到与支撑件(401_1、401_2、401_3)分开构造的外部连接元件(460),其中第二侧面接触夹(203)的边缘埋入封装体(404)中,并且外部端子构件(460)暴露在封装体上。第一横向边缘和第二横向边缘相对于基板(401_1、401_2、401_3)的下侧平面布置在不同的高度处。

著录项

  • 公开/公告号DE102013015942B4

    专利类型

  • 公开/公告日2019-07-18

    原文格式PDF

  • 申请/专利权人 INFINEON TECHNOLOGIES AG;

    申请/专利号DE20131015942

  • 申请日2013-09-25

  • 分类号H01L23/488;H01L23/28;H01L23/492;H01L21/28;H01L21/60;H01L25/16;

  • 国家 DE

  • 入库时间 2022-08-21 11:45:45

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